New
Product Press Release
For immediate release – December 11, 2008
Packet-Master USB Bus Analyzers reveal USB details at unbeatable price.
Pittsford, NY: Packet-Master™ range of USB Bus Analyzers offer the most cost-effective, intuitive solution to the development of USB low/full/high-speed devices, connecting transparently between a host computer and a USB device, and capturing all USB activity without influencing the link. Packet-Master USB12 is the ideal cost-effective solution for low and full-speed development, while Packet-Master USB480+ is suited to low-, full- and high-speed devices, as well as revealing the operation of USB OTG hosts. Packet-Master USB480+ has comprehensive triggering functions and a large FIFO. Packet-Master USB500 AG, provides all the functionality of the USB480+, but also features a USB Generator. Emulating a host or a device, it allows you to exercise a unit under development in any way you wish. Additionally, it features built-in VBUS voltage and current measurement.
The USB Specification defines seventeen Standard Device Requests which must be correctly implemented in any USB device in order for the device to be successfully enumerated by the host controller. When developing a USB-based device it is a major undertaking to implement the basic USB Framework correctly, since enumeration can fail for any number of reasons involving incorrect responses to requests. There is no substitute for a comprehensive USB bus analyzer for revealing packet transfers on the bus. Software-based analyzers can only give a partial picture of what is happening, usually not reporting the packets containing errors.
Packet-Master Analyzers provide exact visual indication where a device under test is failing, potentially saving weeks of wasted development. Intuitive GraphicUSB software – provided free - immediately provides deep understanding of the data transfers and related timings, with errors distinctly highlighted. GraphicUSB can be equipped with a wide range of standard and vendor class analysis options. Convenient filtering toolbar buttons allow rapid manipulation of the display. A single click enables Top Level only representation to provide a fast overview of the protocol, and similarly a single click reveals every single bus event. A set of standard filter buttons enables a rich selection of intermediate representations. Custom filters allow devices or endpoints of no interest to be omitted from the display for increased clarity.
The top-of-the range Packet-Master USB500AG can be configured either as a hardware USB Bus Analyzer, or a USB Generator, and is intended for development of Low, Full and High Speed USB devices or hosts. It includes On-The-Go analysis, a 64 Mbyte FIFO, and advanced hardware triggering. Configured as a USB Generator, it can emulate a host or a device, allowing you to exercise a unit under development in multiple ways.
An essential capability is
to be able to capture events occurring before the trigger point, to investigate
events leading up to a particular situation. Packet-Master USB500AG
allows Pre-Trigger buffer sizes of between 2K bytes and 32 Mbytes.
Packet-Master analyzers feature convenient front-panel push buttons to
control USB data capture from the analyzer rather than the host PC.
If you need to save USB development time, identify problems fast, fine-tune USB
performance, view Host Command sequences, or emulate any host or device
sequence, then Packet-Master USB Bus Analyzers are a terrific choice.
Packet-Master analyzers USB12/USB480+/USB500AG are available now
from Saelig Co.
