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ByteMaster Decoder Option - SPI

    ByteMaster Decoder Option - SPI

    Manufacturer: Saelig


    This product is discontinued.

     

    New Page 2

    Introduction

    SPI is a synchronous serial data link which operates in full duplex mode.  Devices communicate in Master/Slave mode where the Master device initiates the data frame.  Multiple Slave devices are allowed, each with its own "slave select" (SS, or chip select CS) lines.  SPI can be referred to as a 'four-wire' serial bus.  The four specific logic signals are: SCLK (serial clock output from the Master), MOSI/MISO (Master output, Slave input, from the Master device), MISO/SOMI (Master input, Slave output, from a Slave device), and SS (Slave select, active low output from Master). 

    The SPI bus can operate with one Master device and one or more Slave devices.  The Master also sets the clock polarity and phase with respect to the data. 

    SPI Analysis Function: when enabled, the MOSI / MISO signal data will display on the screen.  By the configuration settings, various I/O pins can be chosen, either MOSI or MISO displayed, and SS

     

    Specification

    Bus Line SS、MOSI、MISO、SCLK
    Frequency 10M~150MHZ
    Voltage Depend to Datasheet
    Area of project application EEPROM

     

    User Manual

    Product Spec

    Software




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